1. Field of the Invention
The present invention generally relates to, and more particularly to constant voltage power supply circuits and methods of testing the same, and more particularly to a constant voltage power supply circuit having an excessive current protection circuit, and to a method of testing such a constant voltage power supply circuit by accurately measuring a set current value of the excessive current protection circuit.
2. Description of the Related Art
Conventionally, an excessive current protection circuit is provided for suppressing an output current of a constant voltage power supply circuit to a predetermined current value or less, so as to prevent damage to the load or power supply circuit, even if the output current of the constant voltage power supply circuit abnormally increases due to an excessive load, a short-circuiting of an output terminal and the like.
As general methods employed in excessive current protection circuits, there is a first method that reduces the output voltage by suppressing an increase of the output current beyond a predetermined current if the output current increases up to the predetermined current, and a second method that reduces the output current and also reduces the output current. According to the second method, the voltage-current characteristic that is obtained generally forms the shape of the numeral “7”. The increase in the output power, which is the product of the output current and the output voltage, is small according to the second method, and the power consumption within the power supply circuit during operation of the excessive current protection circuit is relatively small. For this reason, although the circuit structure becomes slightly complex, inexpensive parts may be used in the power supply circuit, thereby making the second method popular.
FIG. 1 is a circuit diagram showing an example of a conventional constant voltage power supply circuit having an excessive current protection circuit employing both the first and second methods. For example, the constant voltage power supply circuit may be derived from Japanese Laid-Open Patent Applications No. 2002-169618 and No. 2003-67062.
In FIG. 1, a constant voltage power supply circuit 100 forms a series regulator having a first excessive current protection circuit 101 employing the first method and a second excessive current protection circuit 102 employing the second method.
FIG. 2 is a diagram showing an output current versus output voltage characteristic of the constant voltage power supply circuit 100 shown in FIG. 1. In FIG. 2, the ordinate indicates an output voltage Vo, and the abscissa indicates an output current io, both in arbitrary units.
Next, a description will be given of the excessive current protection operation of the first and second excessive current protection circuits 101 and 102, by referring to FIG. 2.
The element size of a PMOS transistor M2 shown in FIG. 1 is sufficiently small compared to that of a PMOS transistor M1 for output voltage control. For this reason, a drain current id2 of the PMOS transistor M2 is smaller than a drain current id1 of the PMOS transistor M1. However, the gates of the PMOS transistors M1 and M2 are connected to an output terminal of a differential amplifier circuit A1, and the sources of the PMOS transistors M1 and M2 are connected to a power supply voltage Vdd. Hence, the drain current id2 is proportional to the drain current id1. A reference voltage Vref generated from a reference voltage generating circuit 2 is input to an inverting input terminal of the differential amplifier circuit A1.
The drain current id2 becomes a drain current id3 of an NMOS transistor M3 which forms a current mirror circuit together with an NMOS transistor M4. Accordingly, a drain current id4 of the NMOS transistor M4 is proportional to the drain current id2. In addition, when the NMOS transistors M3 and M4 are formed by transistors having the same characteristics, the drain current id4 becomes equal to the drain current id2.
The drain current id1 is a sum of the output current io and a current ir that flows through a series circuit made up of resistors R1 and R2. But since the current ir is set to an extremely small current value, the drain current id1 may be considered as being equal to the output current io for current values at which the excessive current protection circuit operates. For this reason, the drain current id4 of the NMOS transistor M4 is also proportional to the drain current id1, that is, proportional to the output current io. Moreover, since the drain current id4 flows to a resistor R3, a voltage drop across the resistor R3 is proportional to the output current io.
When the output current io reaches a maximum load current imax at a point c in FIG. 2, the voltage drop across the resistor R3 becomes a threshold voltage of a PMOS transistor M5. Furthermore, when the output current io exceeds the maximum load current imax, the PMOS transistor M5 turns ON to increase the gate voltage of the PMOS transistor M1, so as to suppress the increase of the drain current id1 of the PMOS transistor M1, that is, the increase of the output current io. Consequently, the output voltage Vo decreases in a state where the output current io remains to be the maximum load current imax, as shown in FIG. 2.
In addition, the element size of a PMOS transistor M6 is sufficiently small compared to that of the PMOS transistor M1. The gate of the PMOS transistor M6 is connected to the output terminal of the differential amplifier circuit A1, and the source of the PMOS transistor M6 is connected to the power supply voltage Vdd, similarly to the PMOS transistors M1 and M2 described above. Hence, a drain current id6 of the PMOS transistor M6 is also proportional to the output current io. Since the drain current id6 flows to a resistor R4, a voltage drop across the resistor R4 is proportional to the output current io.
In addition, when the output voltage Vo decreases, an output voltage of a differential amplifier circuit A2 decreases, so as to lower the gate voltage of a PMOS transistor M7. Hence, the PMOS transistor M7 turns ON and raises the gate voltage of the PMOS transistor M1, and the drain current id1 decreases. As a result, the output voltage Vo further decreases, and both the output voltage Vo and the output current io decrease as shown in FIG. 2. A short-circuit current is indicated at a point C in FIG. 2 is the current that flows when the output voltage Vo decreases to 0 V.
A non-inverting input terminal of the differential amplifier circuit A2 is connected, via an offset voltage generating circuit 7 that generates an offset voltage Vs, to a node that connects the resistors R1 and R2. However, when a resistor for use in detecting the output voltage is additionally provided, a different voltage may be input to the non-inverting input terminal of the differential amplifier circuit A2.
When testing the constant voltage power supply circuit 100, it is necessary to measure the current values of the maximum load current imax and the short-circuit current is described above. However, it is difficult to accurately measure such current values.
For example, when measuring the current values of the maximum load current imax and the short-circuit current is of the constant voltage power supply circuit 100 shown in FIG. 1, an ammeter 13 and a dummy load 12 are connected to an output terminal OUT. In this case, it is impossible to accurately set the output voltage Vo that is required to measure the maximum load current imax and the short-circuit current is due to the contact resistance of the output terminal OUT or the contact resistance of the connection terminal of the dummy load 12 that connects to the ground voltage. In addition, because the output voltage Vo does not accurately decrease to 0 V, even though the short-circuit current is should originally have the current value at the point C shown in FIG. 2, the current value at a point D is actually measured, and an accurate measurement of the short-circuit current is is difficult. In FIG. 2, Voscm indicates the voltage value of the output voltage Vo when measuring the short-circuit current is.
Moreover, if the excessive current protection circuit consists solely of the second excessive current protection circuit 102 or, a voltage value Vo1 of the output voltage Vo at which the second excessive current protection circuit 102 starts to operate is close to a rated output voltage Voro, the output current io becomes unstable. As a result, even though the maximum load current imax should originally have the current value at the point c shown in FIG. 2, the current value at a point d is actually measured, and an accurate measurement of the maximum load current imax is also difficult.